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RClamp0514M
PIN Descriptions
PROTECTION PRODUCTS
Applications Information (continued)
ESD Protection With RailClamps ?
RailClamps are optimized for ESD protection using the
rail-to-rail topology. Along with good board layout, these
devices virtually eliminate the disadvantages of using
discrete components to implement this topology. Con-
sider the situation shown in Figure 4 where discrete
diodes or diode arrays are configured for rail-to-rail
protection on a high speed line. During positive duration
ESD events, the top diode will be forward biased when
the voltage on the protected line exceeds the reference
voltage plus the V F drop of the diode. For negative
events, the bottom diode will be biased when the voltage
exceeds the V F of the diode. At first approximation, the
clamping voltage due to the characteristics of the protec-
tion diodes is given by:
PRELIMINARY
Figure 4 - “Rail-T o-Rail ” Pro t ection Topology
(First Approximation)
V C = V CC + V F
V C = -V F
(for positive duration pulses)
(for negative duration pulses)
However, for fast rise time transient events, the effects of
parasitic inductance must also be considered as shown
in Figure 5. Therefore, the actual clamping voltage seen
by the protected circuit will be:
V C = V CC + V F + L P di ESD /dt (for positive duration pulses)
V C = -V F - L G di ESD /dt (for negative duration pulses)
ESD current reaches a peak amplitude of 30A in 1ns for
a level 4 ESD contact discharge per IEC 61000-4-2.
Therefore, the voltage overshoot due to 1nH of series
inductance is:
V = L P di ESD /dt = 1X10 -9 (30 / 1X10 -9 ) = 30V
Example:
Consider a V CC = 5V, a typical V F of 30V (at 30A) for the
steering diode and a series trace inductance of 10nH.
The clamping voltage seen by the protected IC for a
positive 8kV (30A) ESD pulse will be:
V C = 5V + 30V + (10nH X 30V/nH) = 335V
This does not take into account that the ESD current is
directed into the supply rail, potentially damaging any
components that are attached to that rail. Also note
Figure 5 - The Effects of Parasitic Inductance
When Using Discrete Components to Implement
Rail-T o-Rail Pro t ection
Figure 6 - Rail-T o-Rail Pro t ection Using
RailClamp TVV S Arrays
? 2005 Semtech Corp.
6
www.semtech.com
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